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C/C++ Source or Header  |  1994-01-17  |  9KB  |  171 lines
  1.  
  2. /* $Header: /home/primost/larus/Software/SPIM/RCS/cl-mem.h,v 1.2 1992/11/06 17:47:18 larus Exp $
  3. */
  4.  
  5.  
  6. /* New Memory Macros ... have an extra argument for signalling an exception */
  7.  
  8. #ifdef __STDC__
  9. instruction *cl_bad_text_read (mem_addr addr, int *excpt);
  10. void cl_bad_text_write (mem_addr addr, instruction *inst, int *excpt);
  11. mem_word cl_bad_mem_read (mem_addr addr, int mask, mem_word *dest, int *excpt);
  12. void cl_bad_mem_write (mem_addr addr, mem_word value, int mask, int *excpt);
  13. #else
  14. instruction *cl_bad_text_read ();
  15. void cl_bad_text_write ();
  16. mem_word cl_bad_mem_read ();
  17. void cl_bad_mem_write ();
  18. #endif
  19.  
  20.  
  21.  
  22. #define CL_READ_MEM_INST(MS, LOC, ADDR, PADDR, CMISS, EXPT, RNUM)         \
  23. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  24.  unsigned int tmp;                                                           \
  25.  tmp = tlb_vat(ADDR, 0, 1, &PADDR);                    \
  26.  if (tmp == CACHEABLE) {                        \
  27.    CMISS = cache_service (MS, PADDR, ILOAD, &RNUM);            \
  28.    if (_addr_ >= TEXT_BOT && _addr_ < text_top && !(_addr_ & 0x3))           \
  29.      LOC = text_seg [(_addr_ - TEXT_BOT) >> 2];                             \
  30.    else if (_addr_ >= K_TEXT_BOT && _addr_ < k_text_top && !(_addr_ & 0x3))  \
  31.      LOC = k_text_seg [(_addr_ - K_TEXT_BOT) >> 2];                 \
  32.    else cl_bad_text_read (_addr_, &EXPT);                \
  33.    }                                    \
  34.  else CL_RAISE_EXCEPTION(tmp, 0, EXPT)                     \
  35. }
  36.  
  37.  
  38. #define CL_READ_MEM_BYTE(MS, LOC, ADDR, PADDR, CMISS, EXPT, RNUM)            \
  39. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  40.  unsigned int tmp;                                                           \
  41.  tmp = tlb_vat(ADDR, 0, 1, &PADDR);                                          \
  42.  if (tmp == CACHEABLE) {                                                     \
  43.    CMISS = cache_service(MS, PADDR, LOAD, &RNUM);                            \
  44.    if (_addr_ >= DATA_BOT && _addr_ < data_top)                         \
  45.     LOC = data_seg_b [_addr_ - DATA_BOT];                         \
  46.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP)                     \
  47.     LOC = stack_seg_b [_addr_ - stack_bot];                         \
  48.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top)                 \
  49.     LOC = k_data_seg_b [_addr_ - K_DATA_BOT];                         \
  50.    else cl_bad_mem_read (_addr_, 0, &LOC, &EXPT);}                           \
  51.  else  CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                      \
  52.  }
  53.  
  54.  
  55. #define CL_READ_MEM_HALF(MS, LOC, ADDR, PADDR, CMISS, EXPT, RNUM)            \
  56. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  57.  unsigned int tmp;                                                           \
  58.  tmp = tlb_vat(ADDR, 0, 1, &PADDR);                                          \
  59.  if (tmp == CACHEABLE) {                                                     \
  60.    CMISS = cache_service(MS, PADDR, LOAD, &RNUM);                            \
  61.    if (_addr_ >= DATA_BOT && _addr_ < data_top && !(_addr_ & 0x1))           \
  62.      LOC = data_seg_h [(_addr_ - DATA_BOT) >> 1];                     \
  63.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP && !(_addr_ & 0x1))    \
  64.      LOC = stack_seg_h [(_addr_ - stack_bot) >> 1];                     \
  65.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top && !(_addr_ & 0x1))  \
  66.      LOC = k_data_seg_h [(_addr_ - K_DATA_BOT) >> 1];                     \
  67.    else cl_bad_mem_read (_addr_, 0x1, &LOC, &EXPT);}                         \
  68.  else   CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                     \
  69. }
  70.  
  71.  
  72.  
  73. #define CL_READ_MEM_WORD(MS, LOC, ADDR, PADDR, CMISS, EXPT, RNUM)          \
  74. {register mem_addr _addr_ = (mem_addr) (ADDR);                          \
  75.  unsigned int tmp;                                                            \
  76.  tmp = tlb_vat(ADDR, 0, 1, &PADDR);                                           \
  77.  if (tmp == CACHEABLE) {                                                      \
  78.    CMISS = cache_service(MS, PADDR, LOAD, &RNUM);                             \
  79.    if (_addr_ >= DATA_BOT && _addr_ < data_top && !(_addr_ & 0x3))            \
  80.      LOC = data_seg [(_addr_ - DATA_BOT) >> 2];                          \
  81.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP && !(_addr_ & 0x3))     \
  82.      LOC = stack_seg [(_addr_ - stack_bot) >> 2];                      \
  83.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top && !(_addr_ & 0x3))   \
  84.      LOC = k_data_seg [(_addr_ - K_DATA_BOT) >> 2];                      \
  85.    else cl_bad_mem_read (_addr_, 0x3, &LOC, &EXPT); }                         \
  86.  else  CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                       \
  87.  }
  88.  
  89.  
  90. #define CL_SET_MEM_INST(MS, ADDR, INST, CMISS, EXPT)                     \
  91. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  92.  unsigned int tmp;                                                           \
  93.  CMISS = CACHE_HIT;                                                          \
  94.  text_modified = 1;                                     \
  95.  if (_addr_ >= TEXT_BOT && _addr_ < text_top && !(_addr_ & 0x3))             \
  96.    text_seg [(_addr_ - TEXT_BOT) >> 2] = INST;                             \
  97.  else if (_addr_ >= K_TEXT_BOT && _addr_ < k_text_top && !(_addr_ & 0x3))    \
  98.    k_text_seg [(_addr_ - K_TEXT_BOT) >> 2] = INST;                     \
  99.  else cl_bad_text_write (_addr_, INST, &EXPT);}                              \
  100.  }
  101.  
  102. #define CL_SET_MEM_BYTE(MS, ADDR, PADDR, VALUE, CMISS, EXPT, RNUM)    \
  103. {register mem_addr _addr_ = (mem_addr) (ADDR);                    \
  104.  unsigned int tmp;                                                      \
  105.  tmp = tlb_vat(ADDR, 0, 0, &PADDR);                                     \
  106.  if (tmp == CACHEABLE) {                                                \
  107.    CMISS = cache_service(MS, PADDR, STORE, &RNUM);                      \
  108.    data_modified = 1;                                \
  109.    if (_addr_ >= DATA_BOT && _addr_ < data_top)                    \
  110.      data_seg_b [_addr_ - DATA_BOT] = (unsigned char) (VALUE);            \
  111.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP)                \
  112.      stack_seg_b [_addr_ - stack_bot] = (unsigned char) (VALUE);        \
  113.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top)            \
  114.      k_data_seg_b [_addr_ - K_DATA_BOT] = (unsigned char) (VALUE);      \
  115.    else cl_bad_mem_write (_addr_, VALUE, 0, &EXPT);}                    \
  116.  else  CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                 \
  117.  }
  118.  
  119.  
  120. #define CL_SET_MEM_HALF(MS, ADDR, PADDR, VALUE, CMISS, EXPT, RNUM)           \
  121. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  122.  unsigned int tmp;                                                           \
  123.  tmp = tlb_vat(ADDR, 0, 0, &PADDR);                                          \
  124.  if (tmp == CACHEABLE) {                                                     \
  125.    CMISS = cache_service(MS, PADDR, STORE, &RNUM);                           \
  126.    data_modified = 1;                                     \
  127.    if (_addr_ >= DATA_BOT && _addr_ < data_top && !(_addr_ & 0x1))           \
  128.      data_seg_h [(_addr_ - DATA_BOT) >> 1] = (unsigned short) (VALUE);         \
  129.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP && !(_addr_ & 0x1))    \
  130.      stack_seg_h [(_addr_ - stack_bot) >> 1] = (unsigned short) (VALUE);     \
  131.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top && !(_addr_ & 0x1))  \
  132.      k_data_seg_h [(_addr_ - K_DATA_BOT) >> 1] = (unsigned short) (VALUE);   \
  133.    else cl_bad_mem_write (_addr_, VALUE, 0x1, &EXPT);}                       \
  134.  else  CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                      \
  135.  }
  136.  
  137.  
  138. #define CL_SET_MEM_WORD(MS, ADDR, PADDR, VALUE, CMISS, EXPT, RNUM)           \
  139. {register mem_addr _addr_ = (mem_addr) (ADDR);                         \
  140.  unsigned int tmp;                                                           \
  141.  tmp = tlb_vat(ADDR, 0, 0, &PADDR);                                          \
  142.  if (tmp == CACHEABLE) {                                                     \
  143.    CMISS = cache_service(MS, PADDR, STORE, &RNUM);                           \
  144.    data_modified = 1;                                     \
  145.    if (_addr_ >= DATA_BOT && _addr_ < data_top && !(_addr_ & 0x3))           \
  146.      data_seg [(_addr_ - DATA_BOT) >> 2] = (mem_word) (VALUE);                 \
  147.    else if (_addr_ >= stack_bot && _addr_ < STACK_TOP && !(_addr_ & 0x3))    \
  148.      stack_seg [(_addr_ - stack_bot) >> 2] = (mem_word) (VALUE);             \
  149.    else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top && !(_addr_ & 0x3))  \
  150.      k_data_seg [(_addr_ - K_DATA_BOT) >> 2] = (mem_word) (VALUE);           \
  151.    else     cl_bad_mem_write (_addr_, VALUE, 0x3, &EXPT);}                      \
  152.  else  CL_RAISE_EXCEPTION(tmp, 0, EXPT)                                      \
  153.  }
  154.  
  155.  
  156.  
  157. /* read a word, instruction or data, and don't complain */
  158.  
  159. #define BASIC_READ_MEM_WORD(LOC, ADDR, EXPT)                \
  160. {                                    \
  161.   register mem_addr _addr_ = (mem_addr) (ADDR);                      \
  162.   if (_addr_ >= DATA_BOT && _addr_ < data_top && !(_addr_ & 0x3))    \
  163.     LOC = data_seg [(_addr_ - DATA_BOT) >> 2];                        \
  164.   else if (_addr_ >= stack_bot && _addr_ < STACK_TOP && !(_addr_ & 0x3))\
  165.     LOC = stack_seg [(_addr_ - stack_bot) >> 2];                \
  166.   else if (_addr_ >= K_DATA_BOT && _addr_ < k_data_top && !(_addr_ & 0x3)) \
  167.     LOC = k_data_seg [(_addr_ - K_DATA_BOT) >> 2];                \
  168.   else LOC = cl_bad_mem_read(ADDR, 0x3, &LOC, EXPT);                    \
  169. }
  170.  
  171.